Gan amplifier for wifi applications

ABSTRACT

A gallium nitride (GaN) radio frequency integrated circuit (RFIC) is configured to receive and amplify a low-level WiFi signal to generate a WiFi transmit signal. By using a GaN RFIC, the performance of the RFIC is significantly improved when compared to conventional RFICs for WiFi signals. In one exemplary embodiment, the RFIC has an error vector magnitude less than 29 dBc, an average power output around 29 dBm, and an average power added efficiency of greater than 25%. In additional embodiments, the RFIC has a gain greater than about 32 dB and a peak output power around −37 dB.

FIELD OF THE DISCLOSURE

The present disclosure relates to Gallium Nitride (GaN) radio frequencyintegrated circuits (RFICs) and Monolithic Microwave Integrated Circuits(MMICs) for WiFi (Wireless Fidelity) applications.

BACKGROUND

WiFi (Wireless Fidelity) continues to be a preferred wireless networkingstandard for many homes, offices, and other relatively close-proximityenvironments. Over the years, WiFi standards have evolved to provideimprovements in data throughput, reliability, and security. The evolvingWiFi standards continue to demand increasing complexity from radiofrequency integrated circuits (RFICs) used for transmission of WiFisignals. For example, IEEE 802.11ac, one of the latest iterations of theWiFi standard currently deployed, requires an RF integrated circuit(RFIC) capable of transmitting signals about a relatively wide bandwidth(up to 160 MHz), which places stringent requirements on the linearity ofone or more RF power amplifiers (PAs) used in the RFIC.

Conventionally, Silicon (Si) or Gallium Arsenide (GaAs) RFICs have beenpreferred for the transmission of WiFi signals. Although theseconventional RFICs have provided adequate performance when used withmany previous iterations of the WiFi standard, they are not optimallysuited for the latest generation of WiFi standards, such as IEEE802.11ac. Using conventional RFICs for transmission of WiFi signalsaccording to the latest standards may result in significant losses inthe efficiency of the RFIC. Further, conventional RFICs are limited intheir output power, thereby restricting the distance over which WiFisignals can be transmitted.

Current demand to expand WiFi coverage areas into large spaces andoutdoor environments has prompted a need for RFICs for transmission ofWiFi signals with greater output power. For example, in an attempt tofill coverage gaps in many cellular service networks and offload networkresources, high-power WiFi transmitters may be used together withcellular access points to provide a continuous coverage area. In thefuture, 3GPP Long Term Evolution (LTE) “small cells” are expected to bedeployed, which include a combination of LTE transmitters and WiFitransmitters to fill service coverage gaps in otherwise problematicareas. Accordingly, there is a need for an RFIC for the transmission ofWiFi signals with an improved efficiency and output power.

SUMMARY

The present disclosure relates to radio frequency integrated circuits(RFICs) for WiFi (Wireless Fidelity) signals. According to oneembodiment, a gallium nitride (GaN) RFIC is configured to receive andamplify a low-level WiFi signal to generate a WiFi transmit signal.Using a GaN RFIC to amplify WiFi signals significantly improves theperformance of the RFIC when compared to conventional WiFi RFICs. In oneexemplary embodiment, the RFIC has an error vector magnitude (EVM)around −30 dBc, an average power output around 29 dBm, and an averagepower added efficiency (PAE) greater than about 27%. In additionalembodiments, the RFIC has a gain greater than about 34 dB and a peakoutput power around 37 dB.

According to one embodiment, a GaN RFIC for use in a WiFi transmitterincludes one or more GaN transistors and impedance matching circuitrycoupled in series with the one or more GaN transistors. The one or moreGaN transistors may be configured to receive and amplify a low-levelWiFi signal to generate a WiFi transmit signal. As discussed above,using a GaN RFIC to generate WiFi signals results in significantimprovements in the performance of a device in which the GaN RFIC isincorporated.

According to one embodiment, a wireless access point comprises aprocessor, a first RFIC, and a second RFIC. The first RFIC is configuredto receive low-level long term evolution (LTE) signals from theprocessor and generate an LTE transmit signal. The second RFIC is a GaNRFIC configured to receive and amplify a low-level WiFi signal from theprocessor to generate a WiFi transmit signal. As discussed above, usinga GaN RFIC to generate WiFi signals results in significant improvementsin the performance when compared to conventional WiFi RFICs. Further,including RFICs for generating both LTE and WiFi transmit signals in thewireless access point results in a robust connection to the wirelessaccess point.

Those skilled in the art will appreciate the scope of the presentdisclosure and realize additional aspects thereof after reading thefollowing detailed description of the preferred embodiments inassociation with the accompanying drawing figures.

BRIEF DESCRIPTION OF THE DRAWING FIGURES

The accompanying drawing figures incorporated in and forming a part ofthis specification illustrate several aspects of the disclosure, andtogether with the description serve to explain the principles of thedisclosure.

FIG. 1 shows a wireless access point according to one embodiment of thepresent disclosure.

FIG. 2 shows a wireless access point according to an additionalembodiment of the present disclosure.

FIG. 3 shows an exemplary application of the wireless access pointaccording to one embodiment of the present disclosure.

FIG. 4 shows a wireless access point according to an additionalembodiment of the present disclosure.

FIG. 5 shows details of the radio frequency (RF) front-end circuitryshown in the wireless access point of FIG. 1 according to one embodimentof the present disclosure.

FIG. 6 shows details of a radio frequency (RF) power amplifier (PA) inthe RF front-end circuitry shown in FIG. 2 according to one embodimentof the present disclosure.

FIG. 7 is a two-dimensional representation illustrating an exemplarysemiconductor die structure of the RFIC shown in FIG. 3 according to oneembodiment of the present disclosure.

FIG. 8 shows details of the one or more matching networks shown in FIG.6 according to one embodiment of the present disclosure.

FIGS. 9A-9E are graphs illustrating one or more performance advantagesof the RFIC shown in FIG. 6 according to one embodiment of the presentdisclosure.

DETAILED DESCRIPTION

The embodiments set forth below represent the necessary information toenable those skilled in the art to practice the embodiments andillustrate the best mode of practicing the embodiments. Upon reading thefollowing description in light of the accompanying drawing figures,those skilled in the art will understand the concepts of the disclosureand will recognize applications of these concepts not particularlyaddressed herein. It should be understood that these concepts andapplications fall within the scope of the disclosure and theaccompanying claims.

It will be understood that, although the terms first, second, etc. maybe used herein to describe various elements, these elements should notbe limited by these terms. These terms are only used to distinguish oneelement from another. For example, a first element could be termed asecond element, and, similarly, a second element could be termed a firstelement, without departing from the scope of the present disclosure. Asused herein, the term “and/or” includes any and all combinations of oneor more of the associated listed items.

It will be understood that when an element such as a layer, region, orsubstrate is referred to as being “on” or extending “onto” anotherelement, it can be directly on or extend directly onto the other elementor intervening elements may also be present. In contrast, when anelement is referred to as being “directly on” or extending “directlyonto” another element, there are no intervening elements present.Likewise, it will be understood that when an element such as a layer,region, or substrate is referred to as being “over” or extending “over”another element, it can be directly over or extend directly over theother element or intervening elements may also be present. In contrast,when an element is referred to as being “directly over” or extending“directly over” another element, there are no intervening elementspresent. It will also be understood that when an element is referred toas being “connected” or “coupled” to another element, it can be directlyconnected or coupled to the other element or intervening elements may bepresent. In contrast, when an element is referred to as being “directlyconnected” or “directly coupled” to another element, there are nointervening elements present.

Relative terms such as “below” or “above” or “upper” or “lower” or“horizontal” or “vertical” may be used herein to describe a relationshipof one element, layer, or region to another element, layer, or region asillustrated in the Figures. It will be understood that these terms andthose discussed above are intended to encompass different orientationsof the device in addition to the orientation depicted in the Figures.

The terminology used herein is for the purpose of describing particularembodiments only and is not intended to be limiting of the disclosure.As used herein, the singular forms “a,” “an,” and “the” are intended toinclude the plural forms as well, unless the context clearly indicatesotherwise. It will be further understood that the terms “comprises,”“comprising,” “includes,” and/or “including” when used herein specifythe presence of stated features, integers, steps, operations, elements,and/or components, but do not preclude the presence or addition of oneor more other features, integers, steps, operations, elements,components, and/or groups thereof.

Unless otherwise defined, all terms (including technical and scientificterms) used herein have the same meaning as commonly understood by oneof ordinary skill in the art to which this disclosure belongs. It willbe further understood that terms used herein should be interpreted ashaving a meaning that is consistent with their meaning in the context ofthis specification and the relevant art and will not be interpreted inan idealized or overly formal sense unless expressly so defined herein.

Turning now to FIG. 1, a wireless access point 10 is shown according toone embodiment of the present disclosure. The wireless access point 10includes a network communication interface (COMM), a baseband processor12, RF front-end circuitry 14, and an antenna 16. The baseband processor12 is coupled between the network communication interface (COMM) and theRF front-end circuitry 14, which is in turn coupled to the antenna 16.Generally, the wireless access point 10 provides a wireless interface toone or more network devices, which may use the wireless interface tocommunicate with other network devices connected to the wireless accesspoint 10 via the wireless interface or the network communicationinterface (COMM). Accordingly, the baseband processor 12 mayappropriately route and translate data between the network communicationinterface (COMM) and one or more network devices wirelessly connected tothe wireless access point 10. To provide the wireless interface, the RFfront-end circuitry 14 may receive baseband transmit signals from thebaseband processor 12, modulate and amplify the baseband transmitsignals in accordance with one or more wireless network protocolstandards to generate one or more RF transmit signals, and transmit theRF transmit signals using the antenna 16. In other embodiments,modulation of the baseband signals may occur in the baseband processor12 itself. Further, the RF front-end circuitry 14 may receive RF receivesignals from the antenna 16, amplify and demodulate the RF receivesignals to generate one or more baseband receive signals, and deliverthe baseband receive signals to the baseband processor 12. The networkcommunication interface (COMM) may connect the wireless access point 10to a larger network, for example, the Internet, such that networkdevices connected to the wireless access point 10 via the wirelessinterface may access Internet resources.

Although a single antenna is shown associated with the wireless accesspoint 10 in FIG. 1, those of ordinary skill in the art will appreciatethat the principles of the present disclosure may be applied to wirelessaccess points and other wireless devices including any number ofantennas. Further, those of ordinary skill in the art will appreciatethat the components illustrated in the wireless access point 10 shown inFIG. 1 are merely exemplary, and that a wireless access point or otherwireless device may include more or less components without departingfrom the principles of the present disclosure.

In one embodiment, the wireless access point 10 is a WiFi (WirelessFidelity) access point. Accordingly, the wireless signals transmittedand received by the wireless access point 10 may adhere to one or moreof the IEEE 802.11 standards, for example, 802.11b, 802.11g, 802.11n, or802.11ac, which are herein incorporated by reference in their entirety.In another embodiment, the wireless access point 10 is a 3GPP Long TermEvolution (LTE) “small cell” used to provide LTE coverage to arelatively small geographical area. In one exemplary embodiment, thewireless access point 10 may provide LTE signals over a geographicalarea less than about 0.1 km². Accordingly, the wireless signalstransmitted and received by the wireless access point 10 may adhere toone or more of the 3GPP LTE standards, which are herein incorporated byreference in their entirety. In yet another embodiment, the wirelessaccess point 10 is both a WiFi access point and an LTE “small cell”,such that the wireless signals transmitted and received by the wirelessaccess point 10 adhere to one or more WiFi standards and one or more ofthe 3GPP LTE standards.

FIG. 2 shows the wireless access point 10 according to an additionalembodiment of the present disclosure wherein the wireless access point10 is integrated into a lighting fixture 18. The lighting fixture may bean LED-based lighting fixture, such as a CS series troffer manufacturedby Cree in Durham, N.C. The lighting fixture may include an outer frame20, a reflector 22, a cover 24, an LED light source 26, an electronicshousing 28, and a driver module 30. The outer frame 20 provides supportfor the reflector 22, which allows light generated from the LED lightsource 26 to reflect downwards towards a desired area. The cover 24 maysupport the reflector 22 and the outer frame 20. The driver module 30may be located in the electronics housing 28 with the wireless accesspoint 10. Further, the driver module 30 may provide power to the LEDlight source 26, and may interface with the wireless access point 10 inorder to allow for wireless control of the LED light source 26.Providing the wireless access point in the lighting fixture 18 may allowfor the reliable propagation of WiFi signals in a large indoorenvironment, while simultaneously providing a wireless interface forremote control of the lighting fixture 18.

FIG. 3 shows an exemplary application of the wireless access point 10wherein the wireless access point 10 is mounted on the side of abuilding 32. As discussed above, the wireless access point 10 may beprovided in a geographical area wherein cellular coverage is weak orotherwise problematic. Often, large buildings in urban environmentsinterfere with the propagation of wireless signals, thereby creatingareas with poor or no cellular service. The wireless access point 10 maybe provided in such an area, for example, on the side of a building, inorder to fill one or more of these gaps in coverage. Accordingly, thewireless access point 10 may enable one or more wireless devices 34located in an area with poor cellular service to communicate with oneanother, as well as with a larger network, for example, the Internet.

FIG. 4 shows the wireless access point 10 according to an additionalembodiment of the present disclosure wherein the wireless access point10 is capable of functioning as both an LTE “small cell” and a WiFiaccess point. The wireless access point 10 shown in FIG. 4 issubstantially similar to that shown in FIG. 1, but includes first RFfront-end circuitry 14A associated with a first antenna 16A, and secondRF front-end circuitry 14B associated with a second antenna 16B. Thefirst RF front-end circuitry 14A may be configured to transmit andreceive wireless signals about one or more of the 3GPP LTE standardsover a relatively small geographical area. The second RF front-endcircuitry 14B may be configured to transmit and receive WiFi signalsadhering to one or more of the IEEE 802.11 standards. Accordingly, thewireless access point 10 shown in FIG. 4 is capable of transmitting andreceiving both LTE and WiFi signals, which allows for a more robustconnection mechanism to the wireless access point 10 and may furtherincrease data rates of devices connected to the wireless access point10.

FIG. 5 shows details of the RF front-end circuitry 14 according to oneembodiment of the present disclosure. As shown in FIG. 5, the RFfront-end circuitry 14 includes an RF transmit chain 36, an RF receivechain 38, and a duplexer 40. The RF transmit chain 36 is coupled betweena baseband transmit (TX_BB) interface and the duplexer 40. The RFreceive chain 38 is coupled between the duplexer 40 and a basebandreceive (RX_BB) interface. The duplexer 40 is also coupled to theantenna 16. In operation, when an RF signal is received at the antenna16, it is forwarded to the RF receive chain 38 via the duplexer 40. Alow-noise amplifier 42 in the RF receive chain 38 amplifies the RFreceive signal to an appropriate level, and delivers the amplified RFreceive signal to a demodulator 44, where it is demodulated into abaseband receive signal and delivered to the baseband receive (RX_BB)interface. The baseband processor 10 can then route, translate, orotherwise process the baseband receive signal as necessary.

When a baseband transmit signal is received at the baseband transmit(TX_BB) interface, it is first sent to a modulator 46 in the RF transmitchain 36, where it is modulated according to a predetermined wirelesscommunication protocol standard and delivered to an RF integratedcircuit (RFIC) 48. In some embodiments, modulation of the basebandtransmit signal occurs in the baseband processor 12 itself, and theresulting low-level RF signal is delivered directly to the RFIC 48. TheRFIC 48 then amplifies the resulting low-level RF signal to generate anRF transmit signal, which is sent through the duplexer 40 to the antenna16 for transmission.

As discussed above, it is desirable for the RFIC 48 to have a highefficiency and output power in order to reduce the power consumption ofthe RF transmit chain 36, while simultaneously being capable oftransmitting RF signals from the antenna 16 over a greater distance.Accordingly, the RFIC 48 may be a gallium nitride (GaN) RFIC includingone or more GaN power amplifiers (PAs) similar to part no. CHGV1F006Fmanufactured by Cree in Durham, N.C., the data sheet of which is hereinincorporated by reference in its entirety. Using a GaN RFIC to transmitWiFi signals may result in significant performance improvements of theRF transmit chain 36, and further may allow for the transmission of WiFisignals over a greater distance. In one exemplary embodiment, the RFIC48 is a GaN RFIC with a peak output power of about 37 dBm, a frequencyband of about 5-6 GHz, a gain greater than about 34 dB, an error vectormagnitude (EVM) less than about −30 dBc, an average power output ofabout 29 dBm, and an average power added efficiency (PAE) greater thanabout 27% when transmitting WiFi signals. In an additional embodiment,the GaN RFIC enables the wireless access point 10 to transmit signals atspeeds greater than 1 Gbps.

FIG. 6 shows details of the RFIC 48 according to one embodiment of thepresent disclosure. As shown in FIG. 6, the RFIC 48 includes a firsttransistor TR_1, a second transistor TR_2, an input impedance matchingnetwork 50A, an intermediate impedance matching network 50B, an outputimpedance matching network 50C, a first feedback resistor R_FB1, and asecond feedback resistor R_FB2. The input impedance matching network 50Ais coupled between a power amplifier input interface (PA_IN) and thegate contact of the first transistor TR_1. The first feedback resistorR_FB1 is coupled between the gate contact and the drain contact of thefirst transistor TR_1. The intermediate impedance matching network 50Bis coupled between the drain contact of the first transistor TR_1 andthe gate contact of the second transistor TR_2. The second feedbackresistor R_FB2 is coupled between the gate contact and the drain contactof the second transistor TR_2. The output impedance matching network 50Cis coupled between the source contact of the second transistor TR_2 anda power amplifier output interface (PA_OUT). The source contacts of thefirst transistor TR_1 and the second transistor TR_2 are each coupled toground.

Each one of the impedance matching networks 50 may be configured tomatch the impedance presented to each side of the impedance matchingnetwork 50. Further, one or more of the impedance matching networks 50may be configured to receive a bias voltage from an external source (notshown) at a bias input interface (BIAS_IN), and deliver the bias voltageto either the first transistor TR_1 or the second transistor TR_2.

As discussed above, the RFIC 48 may be a GaN RFIC. Specifically, theRFIC 48 may be monolithically integrated on a single GaN semiconductordie. In one embodiment, the first transistor TR_1 and the secondtransistor TR_2 are GaN high electron mobility transistors (HEMTs),however, those of ordinary skill in the art will appreciate that thefirst transistor TR_1 and the second transistor TR_2 may be fabricatedusing any suitable transistor structure. For example, the firsttransistor TR_1 and the second transistor TR_2 may be field-effecttransistors (FETs), metal-oxide-semiconductor field-effect transistors(MOSFETs), bipolar junction transistors (BJTs), or the like. Asdiscussed above, using a GaN monolithic semiconductor structure for theRFIC 48 results in improvements in efficiency and output power of theRFIC 48 compared to conventional WiFi transmitters.

In additional embodiments, the RFIC 48 may include additional circuitrysuch as power detection circuitry and/or gain control circuitry, whichis monolithically integrated with the RFIC 48.

FIG. 7 shows a two-dimensional cross-section of the RFIC 48semiconductor die according to one embodiment of the present disclosure.As shown in FIG. 7, the first transistor TR_1 and the second transistorTR_2 are GaN HEMTs, which are monolithically integrated with theimpedance matching networks 50. Specifically, the RFIC 48 semiconductordie includes a substrate 52, a channel layer 54 over the substrate 52,and a barrier layer 56 over the channel layer 54. In one embodiment, thechannel layer 54 is GaN, the barrier layer 56 is aluminum galliumnitride (AlGaN), and the substrate 52 is silicon carbide (SiC). Each oneof the first transistor TR_1 and the second transistor TR_2 may includea source contact 58 on the surface of the barrier layer 56 opposite thechannel layer 54, a gate contact 60 adjacent to the source contact 58,and a drain contact 62 adjacent to the gate contact 60, such that thesource contact 58, the gate contact 60, and the drain contact 62 arelaterally separated from one another on the surface of the barrier layer56. Although not shown, each one of the impedance matching networks 50may be formed in the substrate 52, the channel layer 54, the barrierlayer 56, or some combination thereof, or on the surface of the barrierlayer 56. In one embodiment, the first feedback resistor R_FB1 and thesecond feedback resistor R_FB2 are also monolithically integrated withthe first transistor TR_1 and the second transistor TR_2.

In one embodiment, the RFIC 48 semiconductor die is about 1.5 mm long by0.87 mm wide for a total die area around 1.3 mm². Those of ordinaryskill in the art will appreciate that the two-dimensional cross-sectionshown in FIG. 7 is merely illustrative. That is, the RFIC 48semiconductor die may be configured in many different ways, all of whichare contemplated herein.

FIG. 8 shows details of the impedance matching networks 50 according toone embodiment of the present disclosure. As shown in FIG. 8, each oneof the impedance matching networks 50 includes an impedance matchinginput interface (M_IN), an impedance matching output interface (M_OUT),and a number of matching components. Specifically, a first matchinginductor L_M1 is coupled between the impedance matching input interface(M_IN) and a first node 64. A first matching transmission line T_M1, asecond matching inductor L_M2, and a first matching capacitor C_M1 arecoupled in series between the first node 64 and ground. A secondmatching capacitor C_M2 is coupled between the first node 64 and asecond node 66. A third matching capacitor C_M3 is coupled between thesecond node 66 and ground. A third matching inductor L_M3 and a secondmatching transmission line T_M2 are coupled in series between the secondnode 66 and a third node 68. A third matching transmission line T_M3, afourth matching inductor L_M4, a first matching resistor R_M1, and afourth matching capacitor C_M4 are coupled in series between the thirdnode 68 and ground. Finally, a fourth matching transmission line T_M4and a second matching resistor R_M2 are coupled in series between thethird node 68 and the impedance matching output interface (M_OUT).

As will be appreciated by those of ordinary skill in the art, each oneof the impedance matching networks effectively matches an impedanceplaced at the impedance matching input interface (M_IN) with animpedance presented at the impedance matching output interface (M_OUT).Further, those of ordinary skill in the art will appreciate that thenumber of matching components shown in FIG. 8 and their particulararrangement is merely illustrative. That is, the number of matchingcomponents and their particular arrangement may be adjusted based on theparticular application of the impedance matching network withoutdeparting from the principles disclosed herein.

FIG. 9A is a graph illustrating the gain vs. frequency of the GaN RFIC48 according to one embodiment of the present disclosure. As shown inFIG. 9A, the peak gain of the RFIC 48 occurs between 5 GHz and 6 GHz,which is the band specified for transmission of signals according to theIEEE 802.11ac standard, and is greater than about 32 dB. Similarly, FIG.9B is a graph illustrating the output power vs. frequency of the RFIC 48according to one embodiment of the present disclosure. As shown in FIG.9B, the peak output power of the RFIC 48 also occurs between 5 GHz and 6GHz, and is about 37 dBm or 5 watts. The relatively large gain and peakoutput power of the RFIC 48 may allow for transmission of WiFi signalsover a greater distance while consuming less power. Accordingly, theRFIC 48 may experience significant performance improvements whencompared to conventional RFICs used for the transmission of WiFisignals.

FIG. 9C is a graph illustrating the efficiency of the RFIC 48 operatingat the 8 dB backoff power (29 dBm). As shown in FIG. 9C, the efficiencyof the RFIC 48 at the 8 dB backoff power is around 23%, which is asignificant improvement over conventional RFICs used for thetransmission of WiFi signals. Accordingly, the RFIC 48 may produce lessheat than conventional RFICs used for the transmission of WiFi signals,thereby allowing a designer greater flexibility in the design of awireless access point incorporating the RFIC 48.

9D is a graph illustrating the inter-modulation distortion of the RFIC48 operating around 5.7 GHz according to one embodiment of the presentdisclosure. As shown in FIG. 9D, the RFIC 48 experiences low levels ofinter-modulation distortion (around −37 dB) when transmitting at thisfrequency. Accordingly, the RFIC 48 may experience improved linearitycompared to conventional RFICs used for the transmission of WiFisignals.

FIG. 9E is a graph illustrating the error vector magnitude of the RFIC48 when operated between 5 GHz and 6 GHz. As shown in FIG. 9E, the RFIC48 provides a low error vector magnitude, which decreases as thefrequency of operating increases. Additional simulations for GaN RFICsused for WiFi indicate that the error vector magnitude may be furtherdecreased throughout the 5 GHz to 6 GHz spectrum. Accordingly, the RFIC48 may experience improved performance when compared to conventionalRFICs used for the transmission of WiFi signals.

Those skilled in the art will recognize improvements and modificationsto the preferred embodiments of the present disclosure. All suchimprovements and modifications are considered within the scope of theconcepts disclosed herein and the claims that follow.

What is claimed is:
 1. A gallium nitride (GaN) RF integrated circuit(RFIC) configured to receive and amplify a low-level WiFi signal togenerate a WiFi transmit signal.
 2. The RFIC of claim 1 wherein the RFIChas an error vector magnitude less than about −30 dBc, an average poweroutput around 29 dBm, and an average power added efficiency greater thanabout 27%.
 3. The RFIC of claim 2 wherein the RFIC has a gain greaterthan about 34 dB.
 4. The RFIC of claim 3 wherein the RFIC has a peakoutput power around 37 dBm.
 5. The RFIC of claim 1 wherein the RFICcomprises: one or more GaN transistors; and impedance matching circuitrycoupled in series with the one or more GaN transistors.
 6. The RFIC ofclaim 5 wherein the RFIC is a monolithic semiconductor structure.
 7. TheRFIC of claim 6 wherein the monolithic semiconductor structure is builton a silicon carbide (SiC) substrate.
 8. The RFIC of claim 6 wherein theRFIC has a die size less than about 1.5 mm by about 0.9 mm.
 9. The RFICof claim 5 wherein the one or more GaN transistors are high electronmobility transistors (HEMTs).
 10. The RFIC of claim 1 wherein the WiFitransmit signal is an IEEE 802.11ac WiFi signal.
 11. The RFIC of claim 1wherein the RFIC includes one or more of a group comprising powerdetector circuitry and gain control circuitry.
 12. The RFIC of claim 1wherein the RFIC is capable of transmitting signals at a speed greaterthan 1 Gbps.
 13. A gallium nitride (GaN) radio frequency integratedcircuit (RFIC) for use in a WiFi transmitter comprising: one or more GaNtransistors; and impedance matching circuitry coupled in series with theone or more GaN transistors.
 14. The RFIC of claim 13 wherein the RFIChas an error vector magnitude less than about −30 dBc, an average poweroutput around 29 dBm, and an average power added efficiency of greaterthan about 27%.
 15. The RFIC of claim 14 wherein the RFIC has a gaingreater than about 32 dB.
 16. The RFIC of claim 15 wherein the RFIC hasa peak output power around 37 dBm.
 17. The RFIC of claim 13 wherein theRFIC is a monolithic semiconductor structure.
 18. The RFIC of claim 17wherein the monolithic semiconductor structure is built on a siliconcarbide (SiC) substrate.
 19. The RFIC of claim 17 wherein the RFIC has adie size less than about 1.5 mm by 0.9 mm.
 20. The RFIC of claim 13wherein the one or more GaN transistors are high electron mobilitytransistors (HEMTs).
 21. The RFIC of claim 13 wherein the WiFi transmitsignal is an IEEE 802.11ac WiFi signal.
 22. The RFIC of claim 13 furthercomprising one or more of a group comprising power detector circuitryand gain control circuitry.
 23. The RFIC of claim 13 wherein the RFIC iscapable of transmitting signals at a speed greater than 1 Gbps.
 24. Awireless access point comprising: a baseband processor; a first radiofrequency integrated circuit (RFIC) configured to receive and amplify alow-level long term evolution (LTE) signal from the baseband processorto generate an LTE transmit signal; and a second gallium nitride (GaN)RFIC configured to receive and amplify a low-level WiFi signal from thebaseband processor to generate a WiFi transmit signal.
 25. The wirelessaccess point of claim 24 wherein the second RFIC has an error vectormagnitude less than about −30 dBc, an average power output around 29dBm, and an average power added efficiency greater than about 27%. 26.The wireless access point of claim 25 wherein the second RFIC has a gaingreater than about 34 dB.
 27. The wireless access point of claim 26wherein the second RFIC has a peak output power around 37 dB.
 28. Thewireless access point of claim 24 wherein the second RFIC comprises: oneor more GaN transistors; and impedance matching circuitry coupled inseries with the one or more GaN transistors.
 29. The wireless accesspoint of claim 28 wherein the second RFIC is a monolithic semiconductorstructure.
 30. The wireless access point of claim 29 wherein themonolithic semiconductor structure is built on a silicon carbide (SiC)substrate.
 31. The wireless access point of claim 29 wherein the secondRFIC has a die size less than about 1.5 mm by 0.9 mm.
 32. The wirelessaccess point of claim 28 wherein the one or more GaN transistors arehigh electron mobility transistors (HEMTs).
 33. The wireless accesspoint of claim 24 wherein the WiFi transmit signal is an IEEE 802.11acWiFi signal.
 34. The wireless access point of claim 24 wherein thesecond RFIC includes one or more of a group comprising power detectorcircuitry and gain control circuitry.
 35. The wireless access point ofclaim 24 wherein the wireless access point is capable of transmittingsignals at a speed greater than 1 Gbps.